学術論文

  • 長田 康敬, 河口 万由香, 山田 親稔: “3値CMOS論理回路とD-素子の構成,” 電気学会論文誌D, vol.139, no.2, pp.143–148, 2019年2月
  • 荻堂盛也,山田親稔,宮城桂,市川周一,藤枝直輝: “部分再構成を用いたプロセッサの耐故障化手法に関する検討,” 電気学会論文誌D, vol.139, no.2, pp.187–192 2019年2月
  • 松田祐希,宮城桂,山田親稔,谷藤正一,市川周一: “可視光通信向け海中映像伝送システムのFPGA実装,” 電気学会論文誌D, vol. 139, no.2, pp.180–186 2019年2月
  • 真喜志泰希, 市川周一, 藤枝直輝, 山田親稔: “分布間距離を用いたBilateral Filterの準最適パラメータ探索,” 電気学会論文誌D, vol. 137, no. 7, pp. 576–582 (2017).
  • 尾風仁, 山田親稔, 宮城桂, 市川周一: “NWアルゴリズム拡張による配列アラインメントの高速化についての検討,” 電気学会論文誌D, vol. 136, no. 10, pp. 686–691 (2016).
  • 大嶺沢仁, 山田親稔, 宮城桂, 市川周一: “量子暗号Y-00方式の安全性評価に関する検討,” 電気学会論文誌D, vol. 136, no. 10, pp. 698–702 (2016).
  • 比嘉秀斗, 山田親稔, 宮城桂, 市川周一: “正規表現の先読みに対するマッチングハードウェアの改善,” 電気学会論文誌D, vol. 136, no. 10, pp. 692–697 (2016).
  • 武市義弘, 與那嶺尚弘, 鈴木真ノ介, 山田親稔, 野口健太郎, 矢島邦昭, 佐藤淳: “工学実験・実習のスキルを可視化する手法,” 電気学会論文誌D, vol. 136, no. 10, pp. 680–685 (2016).
  • Chikatoshi Yamada and D. Michael Miller: “Using SPIN to Check Simulink Stateflow Models,” International Journal of Networked and Distributed Computing, vol. 4, Issue 1, pp. 65–74 (2016).
  • 真喜志泰希, 山田親稔, 荻野正, 市川周一: “分布間距離を用いたBilateral Filter のパラメータ推定法の一考察,” 電気学会論文誌D, vol. 135, no. 2, pp. 87–92 (2015).
  • 佐渡山史矢, 山田親稔, 市川周一, 荻野正: “単一画像を用いた再構成型超解像合成手法の検討,” 電気学会論文誌D, vol. 135, no. 2, pp. 81–86 (2015).
  • 伊佐周平, 山田親稔, 長田康敬: “Bilateral Filterのハードウェア化による高速化,” 電気学会論文誌D, vol. 133, no. 2, pp. 132–138 (2013).
  • Seiki Akama, Yasunori Nagata and Chikatoshi Yamada: “Three-Valued Temporal Logic Qt and Future Contingents,” Studia Logica: An International Journal for Symbolic Logic Vol. 88, No. 2, pp. 215–231 (2008).
  • Seiki Akama, Yasunori Nagata, Chikatoshi Yamada: “A three-valued temporal logic for future contingents,” Logique et Analyse, Vol 50, No 198, pp. 99–111 (2007).
  • Chikatoshi Yamada, Yasunori Nagata and Zensho Nakao: “An Efficient Specification for System Verification,” Journal of Advanced Computational Intelligence and Intelligent Informatics, Vol.10, No.7, pp. 931–938 (2006).
  • Chikatoshi Yamada, Yasunori Nagata and Zensho Nakao: “Inductive Temporal Formula Specifications for System Verification,” Journal of Advanced Computational Intelligence and Intelligent informatics, Vol.9 No.3， pp. 321–328 (2005).

紀要等

  • 山田親稔，野口健太郎，神里志穂子: “エンジニアリングデザイン教育を目的とした学生主導型実験の取組み,” 独立行政法人国立高等専門学校機構論文集「高専教育」, 第34号, pp. 281–286 (2011).
  • 山田親稔: “An Efficient System Verification based-on Check-Point Extraction Method,” 独立行政法人国立高等専門学校機構沖縄工業高等専門学校紀要, 第3号, pp. 25–30 (2009).

国際学会 (査読あり)

  • Chikatoshi Yamada, Sudhakar Ganti and D. Michael Miller: “SPIN Model Checking for the BEE System,” Proceedings of the IEEE TENCON 2015, (2015).
  • Chikatoshi Yamada and D. Michael Miller: “Using SPIN to check Simulink Stateflow models,” Proceedings of the 14th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2015), pp. 161–166 (2015).
  • Chikatoshi Yamada and D. Michael Miller: “Using SPIN to Check Nondeterministic Simulink Stateflow Models,” Proceedings of the IEEE International Symposium on Multiple-Valued Logic (ISMVL 2015), pp. 145–151 (2015).
  • Taiki Makishi, Shuichi Ichikawa, Tadashi Ogino and Chikatoshi Yamada: “An Efficient Estimation Parameter Method of Bilateral Filter Using Distribution Distance,” Proceedings of the IEEE TENCON 2014, (2014).
  • Satoru Tamura, Chikatoshi Yamada and Shuichi Ichikawa: “Implementation and Evaluation of Modular Multiplication Based on Coarsely Integrated Operand Scanning,” Proceedings of the third International Conference on Networking and Computing (ICNC 2012), pp. 334–335 (2012).
  • Chikatoshi Yamada, Yasunori Nagata and Mototsune Nakahodo: “A System Verification Methodology based on Check-Point Extraction Method,” Proceedings of the Joint 4th International Conference on Soft Computing and Intelligent Systems and 9th International Symposium on Advanced Intelligent Systems (2008).
  • Mototsune Nakahodo, Chikatoshi Yamada and Yasunori Nagata: “Design of Multiple Threshold Gate with Hysteresis for Asynchronous Circuits,” Proceedings of the Joint 4th International Conference on Soft Computing and Intelligent Systems and 9th International Symposium on Advanced Intelligent Systems (2008).

国際学会 (査読なし)

  • Seiya Ogido, Chikatoshi Yamada ,Kei Miyagi and Shuichi Ichikawa: “A Study of Fault-Tolerant Architecture Using Dynamic Partial Reconfiguration,” the 7th International Workshop on Networking, Computing, Systems, and Software (2016).
  • Chikatoshi Yamada, Yasunori Nagata and D. Michael Miller: “Model Checking for Multi-Valued Behaviours,” Proceedings of the 23rd International Workshop on Post-Binary ULSI Systems (2014).
  • Chikatoshi Yamada, Yasunori Nagata and D. Michael Miller: “Efficient Specification Method for Model Checking,” Proceedings of the 22nd International Workshop on Post-Binary ULSI Sysmtes, pp. 44–49 (2013).
  • Chikatoshi Yamada, Ai Makabi and Yasunori Nagata: “Platform-Independent Middleware Code Generation for Functionally Distributed Embedded Systems,” Proceedings of the 20th International Workshop on Post-Binary ULSI Systems, pp. 17–20 (2011).

外部資金

  • 科学研究費助成事業 基盤(C) “国際連携型サスティナブルな技術者育成フレームワークの構築と実践,” 研究期間: 2017年4月 – 2020年3月

研究業績 (Researchmap)